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| (R) ST16ST2G DATA BRIEFING Smartcard MCU With up to 16352 Bytes EEPROM & T2G Authentication Library s s 8 BIT ARCHITECTURE CPU 15 KBytes of USER ROM SECTOR COMBINATIVE 1 KByte of T2G AUTHENTICATION LIBRARY 1.5 KByte of SYSTEM ROM 384 Bytes of RAM 2 2 2 2 s s s s Up to 16352 Bytes of EEPROM, SECTOR COMBINATIVE - Highly reliable CMOS EEPROM technology - 10 year data retention - 300,000 Erase/Write cycle endurance - Protected One Time Programmable block (32 or 64 bytes) - 1 to 32 bytes block either Erase or Write in single cycle programming Micromodule (D3) s EXTENDED VOLTAGE OPERATION - VCC Range: 2.7V to 5.5V SERIAL ACCESS, ISO 7816-3 COMPATIBLE POWER SAVING STANDBY MODE UP TO 5 MHz INTERNAL OPERATING FREQUENCY VERY HIGH SECURITY FEATURES INCLUDING EEPROM FLASH ERASE CONTACT ASSIGNMENT COMPATIBLE ISO 7816-2 ESD PROTECTION GREATER THAN 5000V 2 OPERATING CONFIGURATIONS - ISSUER - USER s s s s s Wafer s s s s s s s T2G SPECIFIC FEATURES AntiClone Function by France Telecom * FRANCE TELECOM LICENCE T2G AUTHENTICATION LIBRARY to build Security Module for ST1333/1335 chips DEDICATED SOFTWARE TOOLS T2G Authentication Library - Emulator with pseudo-ACF - Manager with full ACF - System ROM Library * AntiClone Function = ACF BD.ST2G/9809V2 This is Brief Data from STMicroelectronics. Details are subject to change without notice. For complete data, please contact your nearest Sales Office or SmartCard Products Divison, Rousset, France. Fax: (+33) 4 42 25 87 29 1/2 ST16ST2G DESCRIPTION The ST16ST2G, a member of the standard ST16 device family, is a serial access microcontroller especially designed for high volume and cost competitive Smartcard applications where firmware security algorithm must be implemented. The ST16ST2G is based on 8 bit CPU core and includes on chip memories: 384 Bytes of RAM, 15 KBytes of USER ROM, 1.5 KByte of SYSTEM ROM, and up to 16352 Bytes of EEPROM. The ST16ST2G also includes 1 KByte of T2G Authentication Library. Both ROM and EEPROM memories can be configured into two sectors. Access rules from any memory section or sector to any other are set-up by the User's defined Memory Access Control Matrix (MACM). Reliability data related to the ST16ST2G product manufactured using STMicroelectronics advanced CMOS EEPROM technology confirm data retention up to 10 years and endurance up to 300,000 Erase/Write cycles. As all other ST16 family members, the ST16ST2G is fully compatible with the ISO standards for Smartcard applications. Software development (ROM code, options) can be completed by the ST16-19HDS development system. The ST16ST2G can be delivered either in unsawn or sawn wafers, 180 or 275 micron thickness as well as in micromodule package. Figure 1. Block Diagram V GENERATION PP RAM 8 BIT 384 SYSTEM ROM 1.5 KBtyte ROM 15 KBytes CPU BYTES SECTORS COMBIN. SECT. S SECT. A SECT. B EEPROM Up to 16352 Bytes SECTORS COMBINATIVE SECTOR A SECTOR B MEMORY ACCESS CONTROL MATRIX CLK INTERNAL BUS RST SERIAL I/0's INTERFACE NUMBER GENERATOR SECURITY LOGIC V CC I/O1 I/O2 GND SCP 102b/DS 2/2 |
Price & Availability of ST16ST2G
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